R&D case: Radiation-hardened RISC-V processors for space applications

Project: TRISTAN (Together for RISC-V Technology and Applications)

Satellites require reliable computing to operate in the harsh radiation environment of space. NewSpace approaches offer shorter development cycles and lower Size, Weight, Power and Cost (SWaP-C), but achieving long mission lifetimes with commercial electronics remains challenging. The TRISTAN consortium assessed RISC-V, an open-source processor architecture, as a European alternative for space computing to reduce dependence on non-EU suppliers while enabling customisable, radiation-resilient designs.*

The challenge

Space radiation can cause single event effects that corrupt data, stall processors, or disable systems. To address this challenge, we compared the effectiveness of logic-level and memory-level protection for a RISC-V processor. Additionally, the efficacy of mitigation techniques can vary depending on the software workload, meaning characterisation must account for workload variation to be representative. The findings will help mission designers select optimal protection strategies for specific orbits and applications.

The solution

Eight fault-tolerant configurations of a RISC-V softcore processor were characterised under proton and heavy-ion irradiation using multiple benchmark workloads. The configurations systematically combined different techniques such as lockstep, triple modular redundancy, and error correction code to isolate the contribution of logic-level and memory-level protection. Additionally, hybrid configurations were evaluated to investigate combined mitigation approaches. Data-integrity methods proved most effective, significantly reducing silent data corruption and functional interrupt sensitivity, with minimal impact on energy consumption and processor size. The experimental data allows for reliability analysis, enabling accurate predictions of error rates in orbit.

What we did

NLR designed a custom test board featuring a Microchip PolarFire FPGA with the FreNox RISC-V softcore by Technolution, interfaced with a host controller for automated benchmark execution and real-time error detection. Our team also conducted proton irradiation experiments at 200 MeV at HollandPTC, across eight configurations and four workloads, producing cross-section data with statistical confidence intervals. A follow-up heavy-ion campaign at CERN’s HEARTS facility used lead ions at various linear energy transfer values to characterise direct ionisation effects and multi-bit upsets. The measured system sensitivities enable predictions of in-orbit error and failure rates, informing the selection of flight-model architectures for future missions.

Project partners:

Royal NLR, Technolution, Irdeto, University of Twente

Project timeline:

2023-2026

The TRISTAN project has received funding from the European Union under GA No. 101095947, and is supported by the Chips Joint Undertaking and its members.

The text only reflects the author’s view. The European Commission is not responsible for any usage of the information it contains.

*This research contributes to the development of a SmallSat Instrument Control and Data Processing Unit (CDPU) in The Netherlands.

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